DBI® Ultra


NAME: Direct Bond Interconnect (DBI) Ultra Technology.
USAGE: Die to wafer and die to die bonding with electrical interconnect.
HOW: Wafer surfaces are planarized and bond pads are recessed in a dielectric layer. Wafers are diced, cleaned and activated. Known good die are picked, aligned and bonded at room temperature on top of other known good die. The metal interconnect is formed during low temperature batch anneal.
SOLUTIONS: High Bandwidth Memory (HBM) stacks of 4, 8, 12, 16 or more die, 2.5D / 3D integration of memory with CPUs, GPUs, FPGAs and/or SoCs
for high performance computing.
MARKETS: Data Centers, Autonomous Vehicles, Gaming, 5G Infrastructure, Data Storage & Supercomputers.

DBI® Ultra is an enabling low-temperature, low profile die to wafer and die to die hybrid bonding technology platform. By eliminating the need for copper pillars and underfill, DBI Ultra can enable a dramatically thinner stack than conventional approaches.  DBI Ultra also allows the stacking of die that are the same or different sizes, processed on fine or coarse wafer process technology nodes, or manufactured on the same or different wafer sizes while readily scaling down to 1 µm interconnect pitch providing the ultimate 2.5D and 3D integration flexibility.

DBI wafer to wafer hybrid bonding is ideal for bonding smaller, high yielding die like image sensors, antenna switches and more recently 3D NAND. In contrast, DBI Ultra die to wafer hybrid bonding is suitable for larger die such as DRAM, microprocessors, graphics processors and SoCs. A key attribute of DBI Ultra is that it allows known good die to be bonded to other known good die allowing for high yielding, multi-die stacked 2.5D and 3D assemblies.


Wafer to Wafer Bonding

Die to Wafer Bonding

Die to Die Bonding


DBI Ultra makes it possible to manufacture 4, 8, 12 or 16-high 3D stacked memory while meeting the stringent packaging height and performance requirements for next generation high-performance computing. DBI Ultra enables high bandwidth and high performance 2.5D and 3D integration of memory, CPU, GPU, FPGA or SoC.


DBI Ultra Benefits in 3D Memory Stacking and 2.5D / 3D High-Performance Computing

  • A single stacking solution for all DRAM products: 3DS, HBM2, HBM3, and beyond
  • Exceptional performance and high bandwidth
    • Enables wide range, coarse interconnect pitch to 1µm pitch for next-generation DRAM and 2.5D/3D logic and memory integration
  • Allows integration of same or different die sizes
  • Interconnect layers add no stand-off height, requires no copper pillars or under-fill
  • Low cost and high reliability
    • Can bond directly to Thru-Silicon Via (TSV)
    • Since no copper pillars or under-fill between the die in the stack, it enables better thermal performance




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